Avoid Million-Dollar Design Mistakes with Early Exploration
Date: September 4 2025
Register for Session 1 (APAC): 11:30 AM IST | 2:00 PM CST | 3:00 PM JST/KST: Session1
Register for Session 2 (US): 10:00 AM PST | 1:00 PM EST: Session 2
Speakers
Deepak Shankar, Founder, Mirabilis Design Inc. LinkedIn
Prakash Sahay, Solutions Group Director, Cadence Design Systems Inc. LinkedIn
Overview
Designing SoCs for automotive, defense, aerospace, or industrial markets means juggling power, performance, and reliability under tight timelines. Architecture decisions made too late can lead to costly re-spins and unpredictable results.
Join Cadence and Mirabilis Design for this free webinar to see how VisualSim Architect helps you explore design trade-offs early, integrate seamlessly with Cadence flows, and avoid multi-million-dollar mistakes.
Special Offer for Early Registrants:
The first 100 will receive a 3-month license of VisualSim Cloud:
- Access to the training platform
- 150+ hands-on experiments
- 20 trade-off experiments
Choose Your Session and Register:
Register for Session 1 (APAC): 11:30 AM IST | 2:00 PM CST | 3:00 PM JST/KST: Session1
Register for Session 2 (US): 10:00 AM PST | 1:00 PM EST: Session 2
What You’ll Learn:
- Optimize at the System Level
- Power, performance, and area exploration with 500+ VisualSim blocks
- Monte Carlo simulations for topologies, vendors, and configurations
- Accelerate Architecture Prototyping
- Assemble models with Processors, memory, interconnects, interfaces, NoCs, DMA, DSPs, Networks, communication networks, antennas, power systems, RF/Protocol/DSP algorithms, and more
- Integrate seamlessly with MATLAB, SystemC, Python, JSON, and C/C++
- Bridge Design to Implementation
- Link VisualSim exploration with Cadence implementation flows
- Generate VCD and SystemVerilog traces for downstream power and system-level testing
This Webinar is Ideal For:
- System Architects & SoC Designers
- FPGA & Embedded Software Engineers
- Technical Managers & Evaluators
- Professors & Researchers in Electronics/Systems
Speakers
Deepak Shankar – Founder & Chief Technologist, Mirabilis Design Deepak has guided 150+ semiconductor designs in AI processors, FPGAs, data centers, automotive, and aerospace. He has presented at 50+ conferences and pioneered the integration of model-based systems engineering with product development.
Prakash Sahay – Solutions Group Director, Cadence Prakash brings deep expertise in architecture exploration, digital twin solutions, and virtual prototyping for automotive and other verticals. He has decades of EDA and ESL experience and holds a B.Tech from IIT Delhi. [LinkedIn]
