Webinar: Master SoC Architecture Trade-Offs

Aug 22, 2025  |  Author : admin_mirabilis

Avoid Million-Dollar Design Mistakes with Early Exploration Date: September 4 2025 Register for Session 1 (APAC): 11:30 AM IST | 2:00 PM CST | 3:00 PM JST/KST: Session1 Register for Session 2 (US): 10:00 AM PST | 1:00 PM EST: Session 2 Speakers Deepak Shankar, Founder, Mirabilis Design Inc. LinkedIn Prakash Sahay, Solutions Group Director, […]

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July 2025: Driving Innovation: VisualSim Hits the Road, the Classroom, and Industry

Aug 01, 2025  |  Author : admin_mirabilis

Mirabilis Design Newsletter 2025  Founder’s Note  I hope you’re enjoying a wonderful summer!  At Mirabilis Design, AI is taking center stage — helping us track dynamic behavior during simulation and detecting performance bottlenecks, thus maximizing the role of system modeling. By integrating VisualSim into the broader EDA workflow through co-simulations and more parameters for system components, we’re […]

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Optimizing Automotive Electronics Architecture for Autonomous and Electric Vehicles Using System-Level Modeling

Jun 16, 2025  |  Author : admin_mirabilis

Author: Deepak Shankar, Vice President Technology, Mirabilis Design Inc. Introduction The rapid adoption of autonomous driving technologies and electric vehicles (EVs) has fundamentally shifted automotive electronics design. As AI-based functionalities proliferate across vehicle subsystems, system architects face increasing complexity in balancing performance, power efficiency, and hardware costs. Traditional design approaches relying on spreadsheets and analytical […]

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RISC-V architecture exploration using VisualSim Architect.

Jun 06, 2025  |  Author : admin_mirabilis

Abstract The RISC-V architecture offers unparalleled flexibility in processor design, allowing custom instruction sets, memory hierarchies, and peripheral configurations. This study presents a model-driven approach using VisualSim Architect to explore the performance, power, and functional trade-offs of RISC-V cores in complex system-on-chip (SoC) environments. We simulate multiple RISC-V microarchitectures with configurable pipeline stages, cache hierarchies, […]

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Architecture Exploration of ARM-based SoC and Chiplets

Mar 15, 2025  |  Author : admin_mirabilis

Unlocking Optimal Power and Performance: A Deep Dive into ARM SoC Modeling In the competitive world of semiconductor design, balancing power consumption with high performance is a constant challenge. With VisualSim Architect, engineers can simulate intricate ARM-based SoCs with unparalleled accuracy, paving the way for innovative, power-efficient solutions. The Future of SoC Design: As the […]

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