Revolutionizing ARM-Based SoC Design: Mastering System-Level Modeling with VisualSim Architect The semiconductor landscape is evolving at an unprecedented pace. In an era where ARM-based SoC dominate high-performance computing, efficient system-level modeling has become crucial for experimenting and optimizing superior performance and power optimization. Enter VisualSim Architect—a tool that offers the only architecture models for ARM […]
Mirabilis Design Accelerates SoC Development with New System-Level IP Library for Cadence Tensilica Processors Mirabilis Design Inc., a leader in system-level IP and simulation solutions, has unveiled a new IP library tailored for Cadence Tensilica processors. This strategic development aims to significantly accelerate System-on-Chip (SoC) design and development processes, offering designers a robust platform for […]
Mirabilis Design Adds System-Level Modelling Support for Industry-Standard Arteris FlexNoC and Ncore Network-on-Chip IPs Mirabilis Design Inc., a leader in system-level modeling and simulation solutions, has announced the integration of support for Arteris FlexNoC and Ncore Network-on-Chip (NoC) IPs into its VisualSim Architect tool. This advancement enables designers to perform early-stage architectural exploration and performance […]
What is Architectural Queueing? Architectural queueing is an important topic in the sense that queues are needed at the system-level. Queueing theory has been a mathematical concept since the late 1800’s; actually Agner Erlang from Copenhagen, Denmark; https://en.wikipedia.org/wiki/Erlang_distribution; who worked in the telephone industry; developed the first queues! Architectural queueing handles port operations; whether a […]
Software scheduling across multi-core architecture with Coherent Caches and Distributed Computing Systems Transform Your Approach to Multi-Core Scheduling with Mirabilis Design As multi-core systems evolve, so do the challenges in software scheduling. Engineers and architects are constantly seeking ways to reduce latency, enhance throughput, and manage power more efficiently. If you’re looking to stay ahead […]
