Avoid Million-Dollar Design Mistakes with Early Exploration Date: September 4 2025 Register for Session 1 (APAC): 11:30 AM IST | 2:00 PM CST | 3:00 PM JST/KST: Session1 Register for Session 2 (US): 10:00 AM PST | 1:00 PM EST: Session 2 Speakers Deepak Shankar, Founder, Mirabilis Design Inc. LinkedIn Prakash Sahay, Solutions Group Director, […]
July 2025: Driving Innovation: VisualSim Hits the Road, the Classroom, and Industry
Mirabilis Design Newsletter 2025 Founder’s Note I hope you’re enjoying a wonderful summer! At Mirabilis Design, AI is taking center stage — helping us track dynamic behavior during simulation and detecting performance bottlenecks, thus maximizing the role of system modeling. By integrating VisualSim into the broader EDA workflow through co-simulations and more parameters for system components, we’re […]
ARM-Based SoC Design: Mastering System-Level Modeling
Revolutionizing ARM-Based SoC Design: Mastering System-Level Modeling with VisualSim Architect The semiconductor landscape is evolving at an unprecedented pace. In an era where ARM-based SoC dominate high-performance computing, efficient system-level modeling has become crucial for experimenting and optimizing superior performance and power optimization. Enter VisualSim Architect—a tool that offers the only architecture models for ARM […]
What is Architectural Queueing?
What is Architectural Queueing? Architectural queueing is an important topic in the sense that queues are needed at the system-level. Queueing theory has been a mathematical concept since the late 1800’s; actually Agner Erlang from Copenhagen, Denmark; https://en.wikipedia.org/wiki/Erlang_distribution; who worked in the telephone industry; developed the first queues! Architectural queueing handles port operations; whether a […]
System-Level Scheduling for Multi-Core Architectures
A Deep Dive into System-Level Scheduling for Multi-Core Architectures In today’s era of heterogeneous computing, software scheduling is no longer a straightforward task. With systems integrating CPUs, GPUs, AI accelerators, and advanced networking, engineers must balance several factors—from cache coherency to distributed task execution—when designing task schedulers. This blog explores the technical challenges and state-of-the-art […]