Cracking the Power Code: Innovative Approach to SoC Power Optimization All about Power distribution, Management, Storage and Consumption. Would you like to estimate the full SoC power consumed by an application or use case? Would like to test the power management strategy prior to development? Would you like the system model to generate Systemverilog, […]
System level SOC Power Modeling with VisualSim- Part 2 In the part 1 of this system-level power modeling series we introduced VisualSim and laid the foundation for the exploration of SoC power architecture. VisualSim Architect is a system level simulation tool which provides a one stop solution for early system level analysis and design space […]
System Level SOC Power Modeling with VisualSim In the intricate realm of System-on-Chip (SoC) design, optimizing power is paramount. This article series begins by introducing VisualSim, a versatile simulation tool, as a powerful contender in the domain of SoC power modeling and optimization. VisualSim enables system-level SoC power modeling even before delving into the intricacies […]
Latest in the VisualSim World This is our sixth newsletter and the second of 2022. It has been a very satisfying search to find new information. Please drop me an email if you have special requests or alternate topics to discuss. As more products and System-on-Chips (SoC) are integrating Artificial Intelligence (AI) Accelerators, the space […]
Mirabilis Design provides system-level intellectual property for architecture exploration and analysis. This is carried out using a high performance simulation platform allowing users to rapidly study the performance, power and functionality of semiconductors, embedded systems and the software. Using the Mirabilis Design environment, companies can eliminate all surprises before they begin the development and the […]
