Cyber-Physical System Design from Mirabilis Design

Mar 10, 2023  |  Author : admin_mirabilis
admin_mirabilisLeave a comment Blog

Overview Mirabilis Design is the eco-system for cyber-physical system design with an integrated communication, test, and exploration from requirements to deployment.  VisualSim Architect brings together all engineering disciplines in a single multi-simulator environment to assign software tasks to compute resources, optimize the compute resource, design the network topology of boards, and connect with other simulators […]

Read more

Architecture Exploration of Artificial Intelligence/Machine Learning Applications and Processors

Sep 03, 2020  |  Author : admin_mirabilis
admin_mirabilisLeave a comment Uncategorized

Industry Background Artificial Intelligence (AI) applications take into consideration the compute, storage, memory, pipeline, communication interface, software, and control. Further, AI application processing can be distributed across multi-core within processors, multiple processor boards on a PCIe backbone, computers distributed across an ethernet network, high-performance computers, or systems across a data center. In addition, AI processors […]

Read more

Architecting for Efficiency: Measuring and Managing Power from Chiplet to System

Oct 21, 2025  |  Author : admin_mirabilis
admin_mirabilisLeave a comment Uncategorized

Power defines performance. Join Mirabilis Design on November 6 2025 in a Webinar to see how VisualSim Architect lets system architects explore, measure, and optimize power at every stage of design.  Speakers:  Deepak Shankar, Founder & Chief Technologist, Mirabilis Design Inc.  LinkedIn Profile Overview Across the globe, data centers and high-performance computing systems are now measured by […]

Read more

Webinar: Master SoC Architecture Trade-Offs

Aug 22, 2025  |  Author : admin_mirabilis
admin_mirabilisLeave a comment Blog

Avoid Million-Dollar Design Mistakes with Early Exploration Date: September 4 2025 Register for Session 1 (APAC): 11:30 AM IST | 2:00 PM CST | 3:00 PM JST/KST: Session1 Register for Session 2 (US): 10:00 AM PST | 1:00 PM EST: Session 2 Speakers Deepak Shankar, Founder, Mirabilis Design Inc. LinkedIn Prakash Sahay, Solutions Group Director, […]

Read more

July 2025: Driving Innovation: VisualSim Hits the Road, the Classroom, and Industry

Aug 01, 2025  |  Author : admin_mirabilis
admin_mirabilisLeave a comment Blog

Mirabilis Design Newsletter 2025  Founder’s Note  I hope you’re enjoying a wonderful summer!  At Mirabilis Design, AI is taking center stage — helping us track dynamic behavior during simulation and detecting performance bottlenecks, thus maximizing the role of system modeling. By integrating VisualSim into the broader EDA workflow through co-simulations and more parameters for system components, we’re […]

Read more

Optimizing Automotive Electronics Architecture for Autonomous and Electric Vehicles Using System-Level Modeling

Jun 16, 2025  |  Author : admin_mirabilis
admin_mirabilisLeave a comment Blog

Author: Deepak Shankar, Vice President Technology, Mirabilis Design Inc. Introduction The rapid adoption of autonomous driving technologies and electric vehicles (EVs) has fundamentally shifted automotive electronics design. As AI-based functionalities proliferate across vehicle subsystems, system architects face increasing complexity in balancing performance, power efficiency, and hardware costs. Traditional design approaches relying on spreadsheets and analytical […]

Read more

RISC-V architecture exploration using VisualSim Architect.

Jun 06, 2025  |  Author : admin_mirabilis
admin_mirabilisLeave a comment Uncategorized

Abstract The RISC-V architecture offers unparalleled flexibility in processor design, allowing custom instruction sets, memory hierarchies, and peripheral configurations. This study presents a model-driven approach using VisualSim Architect to explore the performance, power, and functional trade-offs of RISC-V cores in complex system-on-chip (SoC) environments. We simulate multiple RISC-V microarchitectures with configurable pipeline stages, cache hierarchies, […]

Read more