General

Why do we need System Design?

System-Level Power Modeling

Semiconductor

Designing a Multimedia SoC using VisualSim

Faster alternate to SystemC modeling

Designing Network-on-Chip architectures

Designing ARM-based SoC

Accelerating Cycle-Accurate System Level Modeling

Increasing Memory Bandwidth without modifying the architecture

Selecting the right Configuration for Video Processing SoC

Comparing AMBA AHB with ABMA AXI for an SoC

Systems

Simulating the timing and power of a IoT network

Evaluating the performance of Programmable Logic Controller

Designing the end-to-end power system

Measuring the performance characteristics of multi PCB distributed systems

Defense and Space

Mission Assurance of a Satellite System

Designing Integrated Modular Avionics

Designing Systems with RAD750 for high-performance Space Applications

Comparing RapidIO and SAE AS6802 - TTEthernet using Dynamic Timing & Power Simulation

Preparing your avionics system for certification

Automotive

Automotive system-level design

Software

Improving the scheduling of software architectures

FPGA

Evaluating the performance and power consumption of a Xilinx Zynq

Training

Block Diagram Editor

Performance Modeling

Architecture Exploration

Modeling DMA-based design

Modeling Processor

Modeling caches and memories

Accelerating Cycle-Accurate System Level Modeling

General

Rethinking the System Design Process

Turing-inspired scripting language simplifies simulation complexity

What Amdahl's Law can tell us about multicores and multiprocessing

Performance Analysis of Scheduling-Based Load Balancing for Distributed and Parallel Systems Using VisualSim

Architecture Exploration Using Performance Modeling

Is accurate system-level power measurement challenging?

Using Ptolemy/VisualSim for Internet-based model Sharing and Communication

Hardware and software don't matter

How to create innovative architecture using VisualSim?

New Trends in Architectural Designs Spur EDA Opportunities

Semiconductor

Comparing AMBA AHB to AXI Bus using System Modeling

Exploring Multicore Power Management with Modeling and Simulation

Selecting memory controllers for DSP systems

Rethinking System-on-chip design at 65 nanometers and below

Product how-to: Reliable SoC bus architecture improves performance

Impacts of Level-2 Cache on Performance of Multimedia Systems and Applications.

VisualSim Power Analyzer generates cycle-accurate power measurement for SoC, memory and systems from a system-level model

Systems

Using virtual system prototyping to evaluate VME hardware platform alternatives

Optimizing video over wireless with performance and architecture modeling

Architecture Exploration of Flash-based Systems

Level-2 Shared Cache versus Level-2 Dedicated Cache for Homogeneous Multicore Embedded Systems

Cache Optimization for Embedded Systems Running H.264/AVC Video Decoder

Selecting the right hardware configuration for the signal processing platform

Requirements modeling ofEmbedded Systems

Extending the Lifetime of SSD Controller

System Level Modeling and Performance Analysis of GPU Based MR Image Reconstruction Algorithm

How to measure Multi- Instruction, Multi-Core Processor Performance using Simulation

Defense and Space

Architecting hardware, software & communications for the electronic battlefield

High performance space VPX payload computing architecture study

Performance analysis of VPX backplane in integrated modular avionics system

Multicore distributed processing architecture with Miss Table in radar systems for real-time severe weather analysis

Addressing Integrated Modular Avionics architecture challenges with early system-level modeling/simulation

Automotive

Designing FlexRay-based Driver Assistance System using Early Hardware-Software Architecture Exploration

Understand the significance of early analysis of AVB-based systems

Modeling and simulation of secure multi-protocol automotive networks

Integration Framework: Autosar Virtual Functional Bus Using a Spreadsheet Modeler

Modeling Autosar in VisualSim

Software

Check out preemptive scheduling in abstract RTOS modeling

Choosing the right RTOS scheduling algorithms

Eliminate risk in real-time software tasks using system-level digital simulation

Building a software test and regression plan

FPGA

Use Simulation to Optimally Allocate Zynq-7000 SoC System Resources

Accelerating Architecture Exploration for FPGA Selection and System Design